In ultralarge-scale integration (ULSI) structures, high circuit speed, high packing density and low power dissipation are needed and, consequently, feature sizes must be scaled downward. The interconnect related time delays become the major limitation in achieving high circuit speeds. Shrinking device size automatically miniaturizes the interconnect feature size which can increase interconnect resistance and interconnect current densities. Poor step coverage of metal in deep via holes also increases interconnect resistance and electromigration failures. As a result of all these factors, replacing current aluminum interconnect materials with lower resistance metal materials has become a critical goal for semiconductor device manufacturers. Using metal films with low resistivities will automatically decrease the RC ("Resistance Capacitance") time delay and this is a huge benefit.
For comparable performance characteristics, aluminum interconnect lines have a current density limit of 2.times.10.sup.5 amp/cm.sup.2 versus a current density limit of 5.times.10.sup.6 amp/cm.sup.2 level for copper lines. Copper electromigration in interconnect lines has a high activation energy, up to twice as large as that of aluminum. Consequently, copper lines that are much thinner than aluminum lines can be used, therefore reducing crosstalk and capacitance. Generally, using copper as an interconnect material leads to one-and-a-half times improvement in the maximum clock frequency on a CMOS (complementary metal-oxide semiconductor) chip over aluminum-based interconnects for devices with effective channel lengths of 0.25 .mu.m. These electrical characteristics of copper provide a strong incentive for developing copper films as interconnect layers in ULSI devices as well as top metal layers. Performance advantages and processing problems for copper and several other metal substitutes for aluminum have been compared in terms of 5,000 .ANG. thick thin films.
References providing background information on these problems and current ULSI research include articles by J. Li, T. Seidel, and J. Mayer, MRS Bulletin 19 (August 1994) p. 15; J. Cho, H. Kang, S. Wong, and Y. Shacham-Diamand, MRS Bulletin 18 (June 1993) p. 31; and P. L. Pai and C. H. Ting, IEEE Electron Device Lett. 10 (1989) p. 423.
Because copper-based interconnects may represent the future trend in ULSI processing, there has been extensive development work on different copper processing techniques. The present state of the art consists of the following copper deposition and via-filling techniques: plating (such as electroless and electrolytic), sputtering (physical vapor deposition, PVD), laser-induced reflow, and CVD (chemical vapor deposition). Copper PVD can provide high deposition rate, but the technique leads to poor via-filling and step coverage. The laser reflow technique is simply not compatible with current VLSI process steps in semiconductor fabrication. Because of all these factors, J. Li et al., in MRS Bulletin 19 (August 1994) p. 15, stated that copper CVD is "the most attractive approach for copper-based multilevel interconnects in ULSI chips". High copper CVD deposition rates (&gt;250 nm/min) at low substrate temperatures are needed to meet throughput requirements in device manufacturing. However, a trade-off exists between deposition rate and desirable film characteristics, such as low resistivity, good step coverage, and complete via filling.
Consequently, other process techniques are under consideration, even though at first, they do not seem as close a fit as Cu CVD does. One such process technique includes electroless plating. Electroless plating is an autocatalytic plating technique, specifically deposition of a metallic coating by a controlled chemical reduction that is catalyzed by the metal or alloy being deposited. Electroless deposition depends on the action of a chemical reducing agent in solution to reduce metallic ions to the metal. However, unlike a homogeneous chemical reduction, this reaction takes place only on "catalytic" surfaces rather than throughout the solution. References providing background information about electroless plating include Thin Film Processes, edited by John L. Vossen and Werner Kern, Academic Press, 1978, p. 210; and Thin Film Phenomena, 2d. ed., Casturi L. Chopra, Robert E. Kreiger, 1979.
Electroless plating has been used to deposit Ni, Co, Fe, Pd, Pt, Ru, Rh, Cu, Au, Ag, Sn, Pb, and some alloys containing these metals plus P or B. Typical chemical reducing agents have included NaH.sub.2 PO.sub.2 and formaldehyde. Simply by immersing a suitable substrate in the electroless solution, there is a continuous buildup of a metal or alloy coating on the substrate. A chemical reducing agent in the solution is a source of the electrons for the reduction M.sup.n+ +ne M.sup.0, but the reaction takes place only on "catalytic " surfaces. Because it is "autocatalytic", once there is an initial layer of deposited metal, the reaction continues indefinitely. Due to this factor, once deposition is initiated, the metal deposited must itself be catalytic in order for the plating to continue.
In a conventional electroless copper plating process, the substrate to be plated is immersed in a stirred bath of the copper electroless solution. This causes several disadvantages:
(1) A variety of additives, such as surfactants, stabilizers, or the like, which are conventionally employed in such baths can have negative effects on the purity, and thus the conductivity, of very thin film of deposited copper. Such additives are typically gradually consumed in the deposition process. They may be decomposed and the products in part incorporated into the deposit or released back into the electrolyte. PA0 (2) The concentration of copper ion in the immediate vicinity of the deposition surface is less than that of the bulk solution because of plating out of the copper ions. The chemical imbalance at this interface can adversely affect the morphology of the plated copper. A rough surface, with high inclusion of contaminants, such as hydrogen gas, byproducts of surfactants and stabilizers, can result. PA0 (3) Periodic refreshing of reactants at the substrate/solution interface is needed to furnish new ions and remove byproducts away from the substrate, in order for a smooth copper surface and higher plating rate to occur. Forced convection is typically used to bring fresh reactants closer to the interface. However, close to the substrate surface, frictional forces between the metal and solution operate to halt or retard the streaming fluid. Therefore, at the substrate surface where forced convection is negligible, diffusion is the only physical mechanism that can transport reactants to the interface.
A spray process for electroless deposition of copper onto sensitized and activated non-conductive substrates, such as Bakelite circuit board material, using a compressed air carrier, is reported in Goldie, "Electroless Copper Deposition," Plating, 51, (1965), 1069-1074.